教师

  • 姓名:喻文健
  • 职称:副教授
  • 电话:62773440
  • 邮箱:yu-wj@tsinghua.edu.cn
  • 个人主页

教育背景

工学学士 (计算机科学与技术), 清华大学, 中国, 1999;

工学硕士 (计算机科学与技术), 清华大学, 中国, 2001;

工学博士 (计算机软件与理论), 清华大学, 中国, 2003.

研究领域

集成电路与系统的计算机辅助设计

数值算法与软件

讲授课程

数值分析 (课号20240033, 本科);

高等数值算法与应用 (课号70240353, 研究生).

教学概况

我所教的课程都与数值计算有关,两门课分别面向本科生和研究生。

数值分析介绍广泛应用于科学与工程中的较基础的数值计算方法。我在教学中除了重视数学理论的严谨性,还面向计算机科学与技术专业的要求,突出课程内容的实用性,增强授课过程的生动性。我在教学中注重算法的具体实现与比较,同时也介绍Matlab软件中有关算法的内容。

高等数值算法与应用作为本科生“数值分析”课程的扩展,讲授数值计算领域中较新、较先进的算法。主要内容包括矩阵分解与应用、大规模线性方程组的 Krylov子空间求解算法、常微分方程数值解法、偏微分方程数值解法基础等,突出数值算法的应用背景,以及设计与实现中应掌握的技巧。此外,我在课程中 还介绍大规模稀疏矩阵的处理技术和FFT快速算法及其应用。通过本课程,我试图启发学生在相关专业领域中应用和改进数值算法,同时提高学生的Matlab 编程能力和科研能力。

研究课题

国家自然科学基金面上课题: 有耗衬底电磁参数的边界元提取算法研究 (2005-2008);

国家自然科学基金面上课题: VLSI芯片级完整耦合互连寄生参数提取算法研究 (2005-2008);

清华大学信息学院基础研究基金课题: 45 纳米及其后CMOS 技术代互连分析与算法研究 (2006-2008);

国家科技重大专项“十一五”课题: 先进EDA工具平台开发(清华大学部分) (2008-2010).

研究概况

自1999年开始,我一直从事超大规模集成电路互连寄生参数提取的算法研究与软件开发。2004年至2007年,面向硅基数模混合电路和射频电路的 设计,我着重研究了基于边界元法的衬底耦合参数提取和高频阻抗提取算法。2005年至2008年,我多次访问美国加州大学圣地亚哥分校(UCSD),在互 连分析与电路仿真方面开展了合作研究。我的主要学术贡献有:

1. 发展、提出了基于直接边界元法的三维电容提取快速算法。我主持开发的两个软件原型——QBEM和HBBEM(与王泽毅教授一起)——作为电容求解引擎,已 被美国ICScape、日本JEDAT等公司嵌入面向超大规模集成电路设计和液晶平面显示器设计的商业软件中。HBBEM的核心算法被IBM Watson研究中心采用并用于开发IBM的首要三维互连电容求解器软件CSurf。

2. 提出了多项基于VLSI新工艺特点的互连电容、电阻提取算法,用于处理悬浮金属哑元、多通孔等复杂结构以及片内随机工艺变动。我在该方向的论文发表于期刊 IEEE Trans. Computer-Aided Design、IEICE Trans. Electronics和会议DATE 2008、DAC 2009中,获得学术界和工业界的关注。

3. 针对数模混合和射频芯片的衬底耦合问题,提出了适应性强、计算效率高的衬底电阻提取算法和频变参数提取算法。我在该方向的论文发表于期刊IEEE Trans. Computer-Aided Design中。

4. 提出了基于阶跃响应的互连信号眼图(eye-diagram)预测算法,并与UCSD的合作者一起提出了用于片外互连的无源均衡电路设计优化算法,发展了 基于频域分析的大规模互连电路瞬态仿真算法。我在该方向的论文发表于期刊IEEE Trans. Computer-Aided Design、IEICE Trans. Electronics和国际会议DAC 2008、ICCAD 2008中。

在集成电路建模与仿真、尤其是寄生参数提取领域,我是国际上一位比较活跃的研究者,多次被邀请担任国际会议程序委员会委员,并为本领域最重要的国际期刊审稿。

管理与服务

《计算机辅助设计与图形学学报》: 编委 (2010-2012);

ASP-DAC 2005, 2007, 2008: 程序委员会委员 (2005-2008);

SLIP 2009: 程序委员会委员 (2009).

奖励与荣誉

教育部自然科学二等奖: 超大规模集成电路物理级优化和验证问题基础研究 (2005);

全国百篇优秀博士论文提名 (2005).

代表性论著

[1] Ling Zhang, Wenjian Yu, Yulei Zhang, Renshen Wang, Alina Deutsch, George A. Katopis, Daniel M. Dreps, James Buckwalter, Ernest S. Kuh and Chung-Kuan Cheng, “Analysis and optimization of low power passive equalizers for CPU-memory links,” IEEE Trans. Advanced Packaging, 2010 (accepted)

[2] Wanping Zhang, Wenjian Yu, Xiang Hu, Ling Zhang, Rui Shi, He Peng, Zhi Zhu, Lew Chua-Eoan, Rajeev Murgai, Toshiyuki Shibuya, Nuriyoki Ito, and Chung-Kuan Cheng, “Efficient power network analysis considering multidomain clock gating,” IEEE Trans. Computer-Aided Design, 28(9): 1348-1358, 2009.

[3] Shan Zeng, Wenjian Yu, Jin Shi, Xianlong Hong, and Chung-Kuan Cheng, “Efficient partial reluctance extraction for large-scale regular power grid structures,” IEICE Trans. on Fundamentals, Vol. E92-A, No.6 pp. 1479-1484, Jun. 2009

[4] Wenjian Yu, Rui Shi, and Chung-Kuan Cheng, “Accurate eye diagram prediction based on step response and its application to low-power equalizer design,” IEICE Trans. on Electronics, Vol. E92-C, No.4, pp. 444-452, Apr. 2009

[5] Wenjian Yu, Xiren Wang, Zuochang Ye, and Zeyi Wang, “Efficient extraction of frequency-dependent substrate parasitics using direct boundary element method,” IEEE Trans. Computer-Aided Design, 27(8): 1508-1513, 2008

[6] Wenjian Yu, Changhao Yan, and Zeyi Wang, “A mixed surface integral formulation for frequency-dependent inductance calculation of 3D interconnects,” Engineering Analysis with Boundary Elements, 2007, 31(10): 812-818

[7] Xiren Wang, Wenjian Yu and Zeyi Wang, “Efficient direct boundary element method for resistance extraction of substrate with arbitrary doping profile,” IEEE Trans. Computer-Aided Design, 2006, vol. 25, no. 12, pp. 3035-3042.

[8] Zuochang Ye, Wenjian Yu, and Zhiping Yu, “Efficient 3D capacitance extraction considering lossy substrate with multi-layered Green’s function,” IEEE Trans. Microwave Theory Tech., 2006, 54(5): 2128-2137

[9] Wenjian Yu, Mengsheng Zhang and Zeyi Wang, “Efficient 3-D extraction of interconnect capacitance considering floating metal-fills with boundary element method,” IEEE Trans. Computer-Aided Design, 2006, 25(1): 12-18.

[10] Wenjian Yu, Zeyi Wang and Xianlong Hong, “Preconditioned multi-zone boundary element analysis for fast 3D electric simulation,” Engineering Analysis with Boundary Elements, 2004, 28(9): 1035-1044.

[11] Wenjian Yu and Zeyi Wang, “Enhanced QMM-BEM solver for three-dimensional multiple-dielectric capacitance extraction within the finite domain”, IEEE Trans. Microwave Theory Tech., 2004, 52(2): 560-566

[12] Taotao Lu, Zeyi Wang and Wenjian Yu, “Hierarchical block boundary-element method (HBBEM): A fast field solver for 3-D capacitance extraction,” IEEE Trans. Microwave Theory Tech., Vol. 52, No. 1, pp. 10-19, 2004.

[13] Wenjian Yu, Zeyi Wang and Jiangchun Gu, “Fast capacitance extraction of actual 3-D VLSI interconnects using quasi-multiple medium accelerated BEM,” IEEE Trans. Microwave Theory Tech., 2003, 51(1): 109-120

[14] Wenjian Yu, Chao Hu, and Wangyang Zhang, “Variational capacitance extraction of on-chip interconnects based on continuous surface model,” in Proc. Design Automation Conference (DAC), San Francisco, CA, USA, July. 2009, pp. 758-763.

[15] Wanping Zhang, Yi Zhu, Wenjian Yu, et al., “Noise minimization during power-up stage for a multi-domain power network,” in Proc. IEEE ASP-DAC 2009, Yokohama, Japan, Jan. 2009, pp. 391-396.

[16] Rui Shi, Wenjian Yu, Yi Zhu, Chung-Kuan Cheng, and Ernest S. Kuh, “Efficient and accurate eye diagram prediction for high speed signaling,” in Proc. International Conference on Computer-Aided Design (ICCAD), San Jose, CA, USA, Nov. 2008, pp. 655-661

[17] Ling Zhang, Wenjian Yu, Haikun Zhu, A. Deutsch, G. A. Katopis, D. M. Dreps, E. Kuh, and C.-K. Cheng, “Low power passive equalizer optimization using tritonic step response,” in Proc. Design Automation Conference (DAC), Anaheim, CA, USA, Jun. 2008, pp. 570-573.

[18] Wangyang Zhang, Wenjian Yu, Zeyi Wang, Zhiping Yu, Rong Jiang, and Jinjun Xiong, “An efficient method for chip-level statistical capacitance extraction considering process variations with spatial correlation,” in Proc. ACM/IEEE Design, Automation & Test in Europe Conference (DATE), Munich, Germany, Mar. 2008, pp. 580-585

[19] Wanping Zhang, Yi Zhu, Wenjian Yu, et. al, “Finding the worst voltage violation in multi-domain clock gated power network,” in Proc. ACM/IEEE Design, Automation & Test in Europe Conference (DATE), Munich, Germany, Mar. 2008, pp. 537-540

[20] Fang Gong, Wenjian Yu, Zeyi Wang, Zhiping Yu, Changhao Yan, “Efficient techniques for 3-D impedance extraction using mixed boundary element method,” in Proc. IEEE ASP-DAC 2008, Seoul, Korea, Jan. 2008, pp. 158-163.

[21] Xiren Wang, Wenjian Yu, Zeyi Wang, “A new boundary element method for multiple-frequency parameter extraction of lossy substrates,” in Proc. IEEE ASP-DAC 2007, Yokohama, Japan, Jan. 2007, pp. 62-67. (best paper candidate)

[22] Changhao Yan, Wenjian Yu, and Zeyi Wang, “A mixed boundary element method for extracting frequency-dependent inductances of 3D interconnects,” in Proc. 7th International Symposium on Quality Electronic Design (ISQED), San Jose, CA, USA, Mar. 2006, pp. 709-714. (best paper candidate)

[23] Mengsheng Zhang, Wenjian Yu, Yu Du and Zeyi Wang, “An efficient algorithm for 3-D reluctance extraction considering high frequency effect,” in Proc. IEEE ASP-DAC 2006, Yokohama, Japan, Jan. 2006, pp. 521-526.

[24] Xiren Wang, Wenjian Yu, Zeyi Wang, “A new boundary element method for accurate modeling of lossy substrates with arbitrary doping profiles,” in Proc. IEEE ASP-DAC 2006, Yokohama, Japan, Jan. 2006, pp. 683-688.

[25] Changhao Yan, Wenjian Yu, Zeyi Wang, “Calculating frequency-dependent inductance of VLSI interconnect by complete multiple reciprocity boundary element method,” in Proc. IEEE ASP-DAC 2006, Yokohama, Japan, Jan. 2006, pp. 844-849.

[26] Xiren Wang, Wenjian Yu and Zeyi Wang, “Substrate resistance extraction with direct boundary element method,” in Proc. IEEE ASP-DAC 2005, Shanghai, China, Jan. 2005, pp. 208-211.

[27] Wenjian Yu and Zeyi Wang, “An efficient quasi-multiple medium algorithm for the capacitance extraction of actual 3-D VLSI interconnects,” in Proc. IEEE ASP-DAC 2001, Yokohama, Japan, Jan. 2001, pp. 366-371. (best paper candidate)

[28] Wenjian Yu and Zeyi Wang, "Capacitance extraction," in Encyclopedia of RF and Microwave Engineering , K. Chang [Eds.] , John Wiley & Sons Inc., 2005.

[29] 喻文健, 徐宁 译.《超大规模集成电路互连分析与综合》, 清华大学出版社, 2008年. 原著: C.-K. Cheng, J. Lillis, S. Lin, N. Chang, Interconnect Analysis and Synthesis, John-Wiley, 2000

[30] 喻文健等 译.《Matlab数值计算》, 机械工业出版社, 2006年. 原著: Cleve B. Moler, Numerical Computing with MATLAB, SIAM Press, 2004