研究方向

High Level Design Automation

High level synthesis and verification for digital systems.

VLSI Physical Design Automatin

Chip floorplanning, placement, routing, timing analysis, power/ground network analysis and optimization, clock network synthesis,

Layout Interconnect Extraction

Modeling and extraction of substrate coupling in mixed-signal IC.

Analog Circuit Design Automation

Automatic routing of analog circuit.

学术理念

Open and collaborative group structure, with shared responsibilities, efforts and rewards.

Principled behavior in all aspects of our research, from citation to reporting, from collaboration to credit assignment, from genesis of idea to genesis of code.

Seeking out and understanding the most meaningful problems for which our abilities can one day lead to meaningful and useful solutions.

Avoidance of incremental work and over-specialization.